MOSIS

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MOSIS (Metal Oxide Semiconductor Implementation Service) is multi-project wafer service that provides metal–oxide–semiconductor (MOS) chip design tools and related services that enable universities, government agencies, research institutes and businesses to prototype chips efficiently and cost-effectively.

Operated by the University of Southern California's Information Sciences Institute (ISI), MOSIS combines customers' orders onto shared multi-project wafers that speed production and reduce costs compared with underutilized single-project wafers. Customers are able to debug and adjust designs, or to commission small-volume runs, without making major production investments. Fabrication costs are also shared by combining multiple designs from a single customer onto one "mask set," or wafer template. According to MOSIS, by the end of 2016, the service had delivered more than 60,000 integrated circuit designs.<ref>Template:Cite web</ref>

Funded by DARPA,<ref>Template:Cite web</ref> MOSIS was created in 1980<ref name="conway-rem">Template:Cite journal</ref> by ISI's Danny Cohen, an Internet pioneer who also developed Voice over Internet Protocol and Video over Internet Protocol.<ref>Template:Cite magazine</ref> It was based on the revolutionary VLSI design methodology of Carver Mead and Lynn Conway, who pioneered and/or popularized the use of technology-independent design rules and modular cell-based, hierarchical system design, testing this new approach to rapid prototyping and short-run fabrication at Xerox PARC.<ref>Template:Cite web</ref> One of the first e-commerce providers, MOSIS also launched the "fabless foundry" industry, in which vendors outsource chip fabrication rather than manufacturing them in-house.<ref>Template:Cite web</ref> Thousands of students also have learned chip design in MOSIS-associate programs.<ref>Template:Cite web</ref>

Many early MOSIS users were students trying IC layout techniques from the seminal book Introduction to VLSI Design (Template:ISBN) published in 1980 by Caltech professor Carver Mead<ref>Template:Cite web</ref> and PARC researcher Lynn Conway, who taught the world's first VLSI class at MIT.<ref>Template:Cite web</ref><ref>Template:Cite web</ref> Some early reduced instruction set computing (RISC) processors such as MIPS (1984) and SPARC (1987) were run through MOSIS during their early design and testing phases.

MOSIS in the 1980s

After the transfer of Xerox PARC's multi-project wafer (MPW) technology to USC/ISI,<ref name="conway-rem" /> the MOSIS Project was created, and the first trial run conducted in August 1980:<ref name="isi-1981">Template:Cite tech report </ref>

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The service became operational in January 1981, with 5-micron nMOS as the first fabrication technology offered; designs were submitted in Caltech Intermediate Form via the ARPANET.<ref name="isi-1981"/> By 1983, more than forty organizations were using the service.<ref name="isi-1984">Template:Cite tech report </ref> Chips were returned to designers approximately a month after the close of a fabrication run.

Over the course of the 1980s, more than 12,000 projects were fabricated through the MOSIS service.<ref name="darpa-1991">Template:Cite tech report </ref> After the initial 5-micron, 1-metal layer nMOS service, new technologies were introduced, advancing to 1.2-micron, 2-metal layer CMOS by 1988. At the end of the 1980s, gallium arsenide (GaAs) fabrication service was added.<ref>Template:Cite conference</ref>

MOSIS Projects in 1980s <ref name="darpa-1991" />
Technology
Size (μm) Layers Type 1981 1982 1983 1984 1985 1986 1987 1988 1989 TOTALS
NMOS 5 1M D Template:Refn 238 441 679
NMOS 4 1M D 20 283 1199 1035 234 18 2789
NMOS 3 1M D 63 56 162 439 309 131 20 1180
CMOS 5 1M D 22 45 67
CMOS 3 2M D 949 1113 887 710 231 3890
CMOS 3 1M A Template:Refn 22 437 106 146 83 5 799
CMOS-SOS 4 D 62 11 73
CMOS 2 2M D 71 225 396 615 1307
CMOS 2 2M A 185 934 1119
CMOS 1.6 2M D 15 70 86 55 226
CMOS 1.2 2M D 27 45 72
TOTALS 258 809 1332 1634 1790 1683 1396 1429 1880
GRAND TOTAL 12,201

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References

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