David Patterson (computer scientist)

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Template:Short description Template:About Template:Infobox scientist David Andrew Patterson (born November 16, 1947) is an American computer scientist and academic who has held the position of professor of computer science at the University of California, Berkeley since 1976. He is a computer pioneer. He announced retirement in 2016 after serving nearly forty years, becoming a distinguished software engineer at Google.<ref>Template:Cite web</ref><ref>Template:Cite web</ref> He currently is vice chair of the board of directors of the RISC-V Foundation,<ref>Template:Cite web</ref> and the Pardee Professor of Computer Science, Emeritus at UC Berkeley.<ref>Template:Cite book</ref>

Patterson is noted for his pioneering contributions to reduced instruction set computer (RISC) design, having coined the term RISC, and by leading the Berkeley RISC project.<ref name=coinrisk /> As of 2018, 99% of all new chips use a RISC architecture.<ref name=nytimes>Template:Cite news</ref><ref name=turing/> He is also noted for leading the research on redundant arrays of inexpensive disks (RAID) storage, with Randy Katz.<ref name=chm>Template:Cite web</ref>

His books on computer architecture, co-authored with John L. Hennessy, are widely used in computer science education. Hennessy and Patterson won the 2017 Turing Award for their work in developing RISC.

Early life and education

David Patterson grew up in Evergreen Park, Illinois. He graduated from South High School in Torrance, California. He then attended the University of California, Los Angeles (UCLA), receiving his Bachelor of Arts degree in Mathematics in 1969. He continued on to obtain his Master of Science degree in 1970 and PhD in 1976, both in Computer Science at UCLA. Patterson's PhD was advised by David F. Martin and Gerald Estrin.<ref name=mathgene>Template:MathGenealogy</ref><ref>Template:Cite web</ref><ref name=phd>Template:Cite thesis</ref><ref>Patterson, D. A., "Verification of Microprograms," Technical Report No. UCLA-ENG-7707, UCLA Computer Science Department, January 1977.</ref>

Research and career

Patterson is an important advocate and developer of the concept of reduced instruction set computing and coined the term "RISC".<ref name=coinrisk >Template:Cite book</ref> He led the Berkeley RISC project from 1980, with Carlo H. Sequin, where the technique of register windows was introduced. He is also one of the innovators of the redundant arrays of independent disks (RAID) together with Randy Katz and Garth Gibson.<ref name=chm/><ref name=computer_architecture>Template:Cite book</ref> Patterson also led the Network of Workstations (NOW) project at Berkeley, an early effort in the area of computer clustering.<ref name="HennessyPatterson2006">Template:Cite book</ref> In 2025, Patterson became Chairman of the Board at Laude Institute, steering the organization with Jeff Dean, Joelle Pineau, and Andy Konwinski.<ref>Template:Cite web</ref>

Past positions

Past chair of the Computer Science Division at U.C. Berkeley and the Computing Research Association, he served on the Information Technology Advisory Committee for the U.S. President (PITAC) during 2003–05 and was elected president of the Association for Computing Machinery (ACM) for 2004–06.<ref name="archive.cra.org">Template:Cite web</ref>

Notable PhD students

He has advised several notable Ph.D. students,<ref name=mathgene/><ref>Template:Cite web</ref> including:

Selected publications

Patterson co-authored seven books, including two with John L. Hennessy on computer architecture: Computer Architecture: A Quantitative Approach (6 editions—latest is Template:ISBN) and Computer Organization and Design RISC-V Edition: the Hardware/Software Interface (5 editions—latest is Template:ISBN). They have been widely used as textbooks for graduate and undergraduate courses since 1990.<ref name="textbook citation">Template:Cite web</ref> His most recent book is with Andrew Waterman on the open architecture RISC-V: The RISC-V Reader: An Open Architecture Atlas (1st Edition) (Template:ISBN).

His articles include:

Awards and honors

Patterson's work has been recognized by about 50 awards for research, teaching, and service, including Fellow of the Association for Computing Machinery (ACM)<ref>Template:Cite web</ref> and the Institute of Electrical and Electronics Engineers (IEEE), and by election to the National Academy of Engineering, National Academy of Sciences, and the Silicon Valley Engineering Hall of Fame. In 2005, he and Hennessy shared Japan's Computer & Communication award and, in 2006, he was elected to the American Academy of Arts and Sciences and the National Academy of Sciences and received the Distinguished Service Award from the Computing Research Association. <ref name="archive.cra.org"/> In 2007 he was named a Fellow of the Computer History Museum "for fundamental contributions to engineering education, advances in computer architecture, and the integration of leading-edge research with education."<ref>Template:Cite web</ref> That same year, he was also named a Fellow of the American Association for the Advancement of Science. In 2008, he won the ACM Distinguished Service Award, the ACM-IEEE Eckert-Mauchly Award, and was recognized by the School of Engineering at UCLA for Alumni Achievement in Academia. Since then he has won the ACM-SIGARCH Distinguished Service Award, ACM-SIGOPS Hall of Fame Award, and the 2012 Jean-Claude Laprie Award in Dependable Computing from IFIP Working Group 10.4 on Dependable Computing and Fault Tolerance. In 2016 he was given the Richard A. Tapia Achievement Award for Scientific Scholarship, Civic Science and Diversifying Computing.<ref>Template:Cite web</ref> For 2020 he was awarded the BBVA Foundation Frontiers of Knowledge Award in Information and Communication Technologies.<ref>BBVA Foundation Frontiers of Knowledge Awards 2020</ref>

At the 2013 California Raw Championships, he set the American Powerlifting Record for the state of California for his weight class and age group in bench press, dead lift, squat, and all three combined lifts.<ref>Template:Cite web</ref>

On February 12, 2015, IEEE installed a plaque at UC Berkeley to commemorate the contribution of RISC-I<ref>Template:Cite web</ref> in Soda Hall at UC Berkeley. The plaque reads:

  • IEEE Milestone in Electrical and Computer Engineering
  • First RISC (Reduced Instruction Set Computing) Microprocessor
  • UC Berkeley students designed and built the first VLSI reduced instruction-set computer in 1981. The simplified instructions of RISC-I reduced the hardware for instruction decode and control, which enabled a flat 32-bit address space, a large set of registers, and pipelined execution. A good match to C programs and the Unix operating system, RISC-I influenced instruction sets widely used today, including those for game consoles, smartphones and tablets.

On March 21, 2018, he was awarded the 2017 ACM A.M. Turing Award together with John L. Hennessy for developing RISC.<ref name=nytimes/> The award attributed them for pioneering "a systematic, quantitative approach to the design and evaluation of computer architectures with enduring impact on the microprocessor industry".<ref name=turing>Template:Cite web</ref>

In 2022 he was awarded the Charles Stark Draper Prize by the National Academy of Engineering alongside John L. Hennessy, Steve Furber and Sophie Wilson for contributions to the invention, development, and implementation of reduced instruction set computer (RISC) chips.<ref name=risc>Template:Cite web</ref><ref name=draper>Template:Cite web</ref>

Charitable work

From 2003 to 2012 he rode in the annual Waves to Wine MS charity event as part of Bike MS; a 2-day cycling adventure. He was the top fundraiser in 2006, 2007, 2008, 2009, 2010, 2011, and 2012.<ref>Template:Cite web</ref>

References

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